| 摘要 |
<p>First and second impurity diffusion regions are disposed in partial surface layers of a semiconductor substrate and spaced apart by some distance. A gate electrode is formed above a channel region defined between the first and second impurity diffusion regions. A gate insulating film is disposed between the channel region and gate electrode. Of the gate insulating film, a portion thereof disposed at least in a partial area along the longitudinal direction of a path interconnecting the first and second impurity diffusion regions, having a lamination structure of a first insulating film, a charge trap film and a second insulating film sequentially stacked in this order. The charge trap film is made of insulating material easier to trap electrons than the first and second insulating films. A control circuit drains holes trapped in each film between the gate electrode and the channel region or at an interface between adjacent films, by applying a hole drain voltage to the gate electrode, the hole drain voltage being higher than a voltage applied to either the first or second impurity diffusion region. <IMAGE> <IMAGE></p> |
