| 摘要 |
An electronic apparatus has in a CPU core an instruction correcting circuit that includes memory cells, a comparator and a selector. The memory cells store, when initializing the electronic apparatus, a correction address, a correction instruction and a correction enabling bit, which are associated with contents of a read-only memory. The comparator compares an instruction address output from an instruction prefetch stage of the CPU core with the correction address stored in the memory cells. The selector selects either an instruction code read from the instruction address of the read-only memory or the correction instruction stored in the memory cells in response to a compared result of the comparator. The electronic apparatus can correct the ROM data after manufacturing without reducing the number of available interrupts or the operation speed of the CPU.
|
