发明名称 |
Implementation of an LRU and MRU algorithm in a partitioned cache |
摘要 |
The present invention provides for determining an MRU or LRU way of a partitioned cache. The partitioned cache has a plurality of ways. There are a plurality of partitions, each partition comprising at least one way. An updater is employable to update a logic table as a function of an access of a way. Partition comparison logic is employable to determine whether two ways are members of the same partition, and to allow the comparison of the ways correlating to a first matrix indices and a second matrix indices. An intersection generator is employable to create an intersection box of the memory table as a function of a first and second matrix indices. Access order logic is employable to combine the output of the intersection generator, thereby determining which way is the most or least recently used way.
|
申请公布号 |
US6931493(B2) |
申请公布日期 |
2005.08.16 |
申请号 |
US20030346294 |
申请日期 |
2003.01.16 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
JOHNS CHARLES RAY;KAHLE JAMES ALLAN;LIU PEICHUN PETER |
分类号 |
G06F12/12;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/12 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|