发明名称 |
Multi-thread parallel processing sigma-delta ADC |
摘要 |
An analog input signal is digitized by first sampling the analog signal to produce a first sequence of analog samples representing successive magnitudes and de-interleaving the first sequence into a set of two or more second sequences. A parallel processing, sigma-delta modulator then processes the set of second sequences to produce a set of two or more third sequences of digital data elements which are then interleaved to produce a fourth sequence of digital data elements. The fourth sequence is then digitally filtered and decimated to produce a fifth sequence of digital data elements representing successive magnitudes of the analog input signal.
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申请公布号 |
US6930625(B1) |
申请公布日期 |
2005.08.16 |
申请号 |
US20040860815 |
申请日期 |
2004.06.04 |
申请人 |
REALTEK SEMICONDUCTOR CORP |
发明人 |
LIN CHIA-LIANG |
分类号 |
H03M1/12;H03M3/00;(IPC1-7):H03M3/00 |
主分类号 |
H03M1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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