发明名称 |
Multiple mode power throttle mechanism |
摘要 |
A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold. |
申请公布号 |
US6931559(B2) |
申请公布日期 |
2005.08.16 |
申请号 |
US20010041013 |
申请日期 |
2001.12.28 |
申请人 |
INTEL CORPORATION |
发明人 |
BURNS JAMES S.;RUSU STEFAN;AYERS DAVID J.;GROCHOWSKI EDWARD T.;ENG MARSHA;TIWARI VIVEK |
分类号 |
G06F1/32;G06F9/318;(IPC1-7):G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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