发明名称 PREDICTABLE DESIGN OF LOW POWER SYSTEMS BY PRE-IMPLEMENTATION ESTIMATION AND OPTIMIZATION
摘要 <p>A method of designing a low power circuit that implements specified functionality, the method including: analyzing code for an algorithmic description of the specified functionality to generate a design representation of the circuit at the algorithmic level; instrumenting the code for the algorithmic description so as to capture data streams during execution/simulation of the algorithmic description; executing/simulating the instrumented code to generate an activity profile for the algorithmic description, wherein said activity profile includes at least portions of data traces of at least a portion of the executed algorithmic description; using the design representation to generate an initial hardware design that is an estimate of hardware resources necessary to implement at least some of the specified functionality; and computing power consumption for the initial hardware design based on the activity profile and power models for the hardware resources.</p>
申请公布号 WO2005072054(A2) 申请公布日期 2005.08.11
申请号 WO2005IB00962 申请日期 2005.01.27
申请人 CHIPVISION DESIGN SYSTEMS AG;NEBEL, WOLFGANG;STAMMERMANN, ANSGAR;HELMS, DOMENIK;SCHMIDT, EIKE;SCHULTE, MILAN;KRUSE, LARS;VON COLLN, GERD;SCHULZ, ARNE 发明人 NEBEL, WOLFGANG;STAMMERMANN, ANSGAR;HELMS, DOMENIK;SCHMIDT, EIKE;SCHULTE, MILAN;KRUSE, LARS;VON COLLN, GERD;SCHULZ, ARNE
分类号 G06F17/50;G06G7/62 主分类号 G06F17/50
代理机构 代理人
主权项
地址