发明名称 Chip mis-position detection method
摘要 The invention includes first detection means ( 9 A) disposed on the side of a stage ( 2 ), for detecting float or peel of semiconductor chips ( 10 ) inside a horizontal or longitudinal row unit regularly arranged in an X or Y axis direction, and second detection means ( 9 B) disposed above the stage ( 2 ), for detecting the positions of the semiconductor chips in a unit horizontal or longitudinal row including the peeling semiconductor chips detected by the first detection means, and specifies the positions of the peeling semiconductor chips on the X-Y coordinate axes among a large number of semiconductor chips regularly arranged in the X and Y axes directions by using the first and second detection means while the stage is being moved in the X and Y axes directions.
申请公布号 US2005173702(A1) 申请公布日期 2005.08.11
申请号 US20050051035 申请日期 2005.02.04
申请人 YAMAMOTO AKIRA;MURAKAMI KONOSUKE;NIKI YOSHIO;ISHIMOTO TAKASHI;UEDA YUTAKA 发明人 YAMAMOTO AKIRA;MURAKAMI KONOSUKE;NIKI YOSHIO;ISHIMOTO TAKASHI;UEDA YUTAKA
分类号 H01L21/66;G01R31/26;G01R31/28;H01L21/00;H01L21/68;H01L23/58;H01L29/10;(IPC1-7):H01L23/58 主分类号 H01L21/66
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