发明名称 |
Analog-digital converter with advanced scheduling |
摘要 |
A first amplifier circuit samples and holds an input analog signal and outputs the same to a subtracting circuit. An AD converter circuit converts the input analog signal into a digital value so as to retrieve a predetermined number of bits. A DA converter circuit converts the digital value derived from conversion by the AD converter circuit into an analog value. A subtracter circuit subtracts an output analog signal from the DA converter circuit from the analog signal input via a first switch or the first amplifier circuit. A second amplifier circuit amplifies an output analog signal from the subtracter circuit by a gain of 2 and outputs the amplified signal. An input switching circuit controls the order of inputs, i.e. the input analog signal and a reference voltage, to voltage comparison elements constituting the Ad converter circuit.
|
申请公布号 |
US2005174277(A1) |
申请公布日期 |
2005.08.11 |
申请号 |
US20050052093 |
申请日期 |
2005.02.08 |
申请人 |
SANYO ELECTRIC CO., LTD. |
发明人 |
TANI KUNIYUKI;WADA ATSUSHI;KOBAYASHI SHIGETO |
分类号 |
H03M1/16;(IPC1-7):H03M1/34;H03M1/12 |
主分类号 |
H03M1/16 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|