发明名称 |
Multistandard video decoder |
摘要 |
<p>Presented herein is a unified decoder architecture. A system comprises a video decoder, instruction memory, and a host processor. The video decoder decodes the video data encoded with the particular standard. The instruction memory stores a first set of instructions and a second set of instructions. The first set of instructions are for decoding encoded video data according to a first encoding standard. The second set of instruction are for decoding encoded video data according to a second encoding standard. The host processor provides an indication to the video decoder indicating the particular encoding standard. The video decoder executes the first set of instructions if the indication indicates that the particular encoding standard is the first encoding standard and executes the second set of instructions if the indication indicates that the particular encoding standard is the second encoding standard. The encoding standards can be MPEG-2, MPEG-4, DV-25. <IMAGE></p> |
申请公布号 |
EP1562383(A2) |
申请公布日期 |
2005.08.10 |
申请号 |
EP20050002311 |
申请日期 |
2005.02.03 |
申请人 |
BROADCOM CORPORATION |
发明人 |
BIDNUR, RAVINDRA;PAI, LAKSHMIKANTH RAMADAS;SHERIGAR, BHASKAR;SANE, ANIRUDDA;BHATIA, SANDEEP;AGARWAL, GAURAV |
分类号 |
G06F9/38;H04N7/26;H04N7/50;(IPC1-7):H04N7/26 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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