发明名称 Time-based scheduler architecture and method for ATM networks
摘要 A flexible and scalable architecture and method that implements dynamic rate control scheduling in an ATM switch. The scheduler shapes a large number of streams according to rate values computed dynamically based on switch congestion information. To handle a large range of bit rates, a plurality of timewheels are employed with different time granularities. The streams are assigned dynamically to the timewheels based on computed rate values. The shaper architecture and method supports priority levels for arbitrating among streams which are simultaneously eligible to transmit. Specifically, a scheduling timestamp is determined by the scheduler in consideration of a dynamic rate varied in dependency upon congestion information, a peak cell rate, and/or a sustainable cell rate, and a burst threshold while a shaping timestamp is also determined with reference to the scheduling timestamp determined by the above-mentioned manner. The scheduler may shape a stream in accordance with a rate determined by an ABR mechanism along with the dynamic rate.
申请公布号 EP1562335(A2) 申请公布日期 2005.08.10
申请号 EP20050009504 申请日期 1999.03.17
申请人 CIENA CORPORATION 发明人 FAN, RUIXUE;MARK, BRIAN L.;RAMAMURTHY, GOPALAKRISHAM;ISHII, ALEXANDER T.
分类号 H04L12/56;H04Q11/04;(IPC1-7):H04L12/56 主分类号 H04L12/56
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