| 摘要 |
Two bias circuits (20) which supply a current to a selected memory cell and a reference memory cell have the same circuit constitution. Each bias circuit includes a first active element (21a, 21b) between a power supply node Vcc and a junction node (Nca, Ncb), where a current is controlled to prevent a voltage level at the junction node from fluctuating, a second active element (22a, 22b) between the power supply node and an output node (Nouta, Noutb), where a current is controlled such that a voltage level at the output node is changed in direction opposite to a voltage level at the junction node in other bias circuit, a third active element (23a, 23b) and a fourth active element (24a, 24b) between the junction node and a current supply node Nsa (Nsb) and between the output node and the current supply node, respectively, where a bias voltage is adjusted. <IMAGE>
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