发明名称
摘要 The method involves synchronizing incoming data and an analyzer, determining the current state of the state machine, configuring a filter for incoming data depending on the state, feeding filtered data to a model of a relevant part of the state machine with states/conditions represented by a circuit, determining the new state by evaluating model results and updating the model by loading at least one state/condition depending on the new state. The method involves synchronizing incoming data and an analyzer, determining the current state of the state machine, configuring a filter (16) in the analyzer for the incoming data depending on the current state, feeding the filtered data to a model (22) of a relevant part of the state machine implemented so states and conditions of this part are represented by a loadable hardware circuit, determining the new current state by evaluating the model results and updating the model by loading at least one further state and/or a further condition into the hardware circuit depending on the new current state. Independent claims are also included for the following: an arrangement for analyzing data and a protocol tester with a data analyzer.
申请公布号 JP3682414(B2) 申请公布日期 2005.08.10
申请号 JP20010111666 申请日期 2001.04.10
申请人 发明人
分类号 H04L29/14;H04L12/26;H04L29/06;(IPC1-7):H04L29/14 主分类号 H04L29/14
代理机构 代理人
主权项
地址