发明名称 |
Redundancy circuit for memory array and method for disabling non-redundant wordlines and for enabling redundant wordlines |
摘要 |
A redundancy circuit for a memory array and a method are provided for disabling non-redundant wordlines and for enabling redundant wordlines. A memory defect address is compared with a current address to be accessed. When there is a miscompare, the access to a non-redundant wordline is allowed to take place as normal. When the memory defect address matches the current address the entire wordline decoder is deactivated through a reset signal and the redundant wordline is activated.
|
申请公布号 |
US6928009(B2) |
申请公布日期 |
2005.08.09 |
申请号 |
US20030600064 |
申请日期 |
2003.06.20 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ADAMS CHAD ALLEN;UHLMANN GREGORY JOHN |
分类号 |
G11C7/00;G11C29/00;(IPC1-7):G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|