发明名称 |
Power supply voltage lowering circuit used in semiconductor device |
摘要 |
A reference voltage generating circuit generates reference voltage and outputs the thus generated reference voltage from an output terminal thereof. A voltage generating circuit lowers external power supply voltage according to the reference voltage supplied from the reference voltage generating circuit to output internal power supply voltage from an output terminal thereof. A transistor has a current path connected between a terminal to which the external power supply voltage is supplied and the output terminal of the voltage generating circuit or between the terminal to which the external power supply voltage is supplied and the output terminal of the reference voltage generating circuit and a gate supplied with constant voltage and has negative threshold voltage.
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申请公布号 |
US6927558(B2) |
申请公布日期 |
2005.08.09 |
申请号 |
US20030671339 |
申请日期 |
2003.09.25 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KAWAGUCHI TAKAYUKI;KASHIWAGI JIN |
分类号 |
G11C11/413;G05F1/46;G05F3/24;H01L21/822;H01L27/04;(IPC1-7):G05F3/16 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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