发明名称 Analog signal outputting circuit and multi-level delta-sigma modulator employing the analog signal outputting circuit
摘要 An analog signal outputting circuit comprises two unit analog circuits for outputting an analog signal, corresponding to levels "-1" or "1", and a low-pass filter for smoothing the analog signal output from the two unit analog circuits, as selected by codes output from the four-valued delta-sigma modulator. In case the input signal is -2 or +2, outputs of the unit analog circuits are summed together to output an analog signal corresponding to -2 or +2. In case the input signal is -1 or +1, outputs of the unit analog circuits are alternately used to output an analog signal corresponding to -1 or +1 to reduce the non-linearity error resulting from variations in the analog devices.
申请公布号 US6927720(B2) 申请公布日期 2005.08.09
申请号 US20040948654 申请日期 2004.09.24
申请人 NEC ELECTRONICS CORPORATION 发明人 MATSUMOTO TETSUYA
分类号 H03M1/66;H03M1/68;H03M3/02;H03M3/04;H03M7/36;(IPC1-7):H03M1/66 主分类号 H03M1/66
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