| 摘要 |
Two memory cells are provided for storage data of one bit, and stores data inverted from each other. Memory cells include charge compensating circuits, respectively, each being formed of an inverter, and charge compensating circuits include P-channel TFTs, respectively, which can be formed on bulk transistors. Charge compensating circuits are cross coupled, and latch data stored in memory cells. As a result, a semiconductor memory device can realize a higher packing density and a larger capacity without requiring refresh operations. |
