发明名称 |
Semiconductor device having MOS transistors and bipolar transistors on a single semiconductor substrate |
摘要 |
The invention is directed to reducing of the number of steps in a BiCMOS process. A first N-well 3 A and a second N-well 3 B are formed deeply on a surface of a P-type semiconductor substrate. A first P-well 4 A is formed in the first N-well 3 A, and an N-channel MOS transistor is formed in the first P-well 4 A. The second N-well 3 B is used as a collector of a vertical NPN bipolar transistor. A second P-well 4 B is formed in the second N-well 3 B. The second P-well 4 B is formed simultaneously with the first P-well 4 A. The second P-well 4 B is used as a base of the vertical NPN bipolar transistor. An N+ emitter layer and a P+ base electrode layer of the vertical NPN bipolar transistor are formed on a surface of the second P-well 4 B.
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申请公布号 |
US6924534(B2) |
申请公布日期 |
2005.08.02 |
申请号 |
US20040816188 |
申请日期 |
2004.04.02 |
申请人 |
SANYO ELECTRIC CO., LTD. |
发明人 |
GOSHIMA KAZUTOMO;OHKODA TOSHIYUKI;TANIGUCHI TOSHIMITSU |
分类号 |
H01L21/331;H01L21/8222;H01L21/8224;H01L21/8228;H01L21/8248;H01L21/8249;H01L27/06;H01L27/082;H01L29/73;H01L29/732;H01L29/735;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 |
主分类号 |
H01L21/331 |
代理机构 |
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