发明名称 Method of forming filled blind vias
摘要 The density of electronic packaging and the electrical reliability of the sub-assemblies utilizing stacked blind vias are improved by providing a blind, landless via in a first dielectric layer laminated to a conductive metal core serving as a ground plane or a power plane. A hole is provided through the dielectric layer extending to the core. A metal, such as copper, is deposited electrolytically using the metal core as the cathode, or electrolessly without seeding into the hole. The metal is deposited on the core and progressively builds in the hole to the depth required for the via. A second dielectric layer is laminated to the first, and is provided with a second layer blind via aligned with the first via. This second via may be formed by conventional plating techniques. Multiple dielectric layers with stacked blind vias can be assembled in this manner.
申请公布号 US6924224(B2) 申请公布日期 2005.08.02
申请号 US20030729174 申请日期 2003.12.05
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 EGITTO FRANK D.;FOSTER ELIZABETH;GALASCO RAYMOND T.;MARKOVICH VOYA R.;NGUYEN MANH-QUAN TAM
分类号 H01L21/48;H01L23/498;H05K1/11;H05K3/46;(IPC1-7):H01L21/476;H01L21/44 主分类号 H01L21/48
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