发明名称 TEST BOARD FOR SEMICONDUCTOR EVALUATION
摘要 PROBLEM TO BE SOLVED: To accurately measure a high-frequency current leaking from a semiconductor element, without being affected by the shape of the semiconductor shape or the connection state. SOLUTION: This test board 1 formed by laminating three substrates comprises a mounting face (first layer) GND solid 8 layer (second layer), an insulating layer (third layer), and a solder face (fourth layer) where a ball grid 7 is formed. A measuring wire 2 is connected to the third layer by a though hole 5, returned to the inside corresponding to the length portion of the measuring wire 2 on the third layer, and connected to the fourth layer. The wire 2 is connected to the ball grid 7 with a connection wire 3 on the fourth layer, and mounted on a device substrate via it. A micro-strip line structure is formed, by forming the measuring wire 2 on the first layer and the second layer to be GND solid 8, and the characteristic impedance is set at 50Ω. The connection wire 3 on the first layer is connected to the fourth layer by the though hole 5, connected to the ball grid 7 by the connection wire 3 on the fourth layer, and mounted on the device substrate via the ball grid 7. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005201691(A) 申请公布日期 2005.07.28
申请号 JP20040006102 申请日期 2004.01.13
申请人 NEC ENGINEERING LTD 发明人 KOBAYASHI KATSUJI;KAGIHARA HIDEKI
分类号 G01R31/26;(IPC1-7):G01R31/26 主分类号 G01R31/26
代理机构 代理人
主权项
地址