WIDEBAND SIGNAL GENERATOR, MEASUREMENT DEVICE, METHOD OF SIGNAL GENERATION, AND METHOD OF SIGNAL ANALYSIS

摘要

PROBLEM TO BE SOLVED: To provide a system and a method which reduce or avoid spurious DDS reply by changing clock signal input to a direct digital synthesizer (DDS). SOLUTION: This signal generator includes a clock generator having a first DDS which is constituted so as to generate a clock signal based on a source signal of clock. The signal generator also includes a clock divider having a second DDS which is constituted so as to generate a divided signal based on (1) a clock signal and (2) a control signal which instructs division ratio, and further, includes a filter which can be selected and is constituted so as to generate a filtered signal based on the divided signal. Selection of the filter which can be selected is performed based on the control signal, selected output frequency, frequency of the divided signal, and/or another value based on the selected output frequency. In at least one example, selectable number of filters is four. COPYRIGHT: (C)2005,JPO&NCIPI