| 摘要 |
PROBLEM TO BE SOLVED: To provide a CPU controller enabling an efficient memory access without providing an exclusive terminal for program trace or a terminal exclusive for communication between a CPU and a control device in debugging of a program of the CPU. SOLUTION: A first memory address space that is read only for the CPU 102 and write only for the control device 114 and a second memory address space that is write only for the CPU and read only for the control device are set within the internal space of a memory 113 shared by the CPU 102 and the control device 114 in a debugging environment, whereby program trace can be performed without using an exclusive terminal. An ID of which value is changed according to writing of a command is set to the memory address spaces, so that the CPU and the control device confirm the mutual memory access states by polling the ID. COPYRIGHT: (C)2005,JPO&NCIPI
|
