| 摘要 |
In an image processor, images are rendered into a plurality of frame buffers and corresponding Z-buffers by depth and the plurality of frame buffers are later combined to form the rendered image. The rendering can be implemented in hardware, software or a combination, for real-time or near real-time rendering of images. The plurality of frame buffers can be processed in parallel using a plurality of frame processors. The rendering can be performed on a stream of polygons received in an arbitrary order so that presorting the polygons is not required. Complex data structures and processing are not required, allowing a rendering process to proceed quickly, which is needed where the rendering must be done in real-time or near real-time for full- or nearly full-motion video. The image processor is provided with an indication of the number of frame buffers in the plurality of frame buffers. With this indication, the image processor can make the program memory allocations if needed and will process the image data with the required fidelity. The number of frame buffers used might vary as needed for different fidelities and images.
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