发明名称 Bias circuit
摘要 A bias circuit, which generates a bias voltage, has a first MOS transistor coupled between a first reference voltage terminal and a voltage dividing node and a second MOS transistor coupled in parallel with the first MOS transistor. The first MOS transistor may have a first ON-state resistance, and the second MOS transistor may have a second ON-state resistance which is lower than the first ON-state resistance. Furthermore, the bias circuit has a resistance circuit coupled between the voltage dividing node and a second reference voltage terminal and a voltage generator coupled with the first node. The voltage generator outputs the bias voltage in dependence upon an electrical potential on the voltage dividing node.
申请公布号 US2005162217(A1) 申请公布日期 2005.07.28
申请号 US20040995408 申请日期 2004.11.24
申请人 FUJIMOTO SHUICHIRO 发明人 FUJIMOTO SHUICHIRO
分类号 H01L27/04;G05F3/24;G05F3/26;H01L21/822;H02J1/00;H03F1/00;H03F3/72;(IPC1-7):H02J1/00 主分类号 H01L27/04
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