| 发明名称 |
DIGITALLY CONTROLLED DELAY CELLS |
| 摘要 |
Systems and methods are disclosed herein to implement signal delay in integrated circuits. For example, in accordance with an embodiment of the present invention, a master delay circuit may digitally control one or more slave delay cells to support various applications of a programmable logic device. |
| 申请公布号 |
WO2005041251(A3) |
申请公布日期 |
2005.07.28 |
| 申请号 |
WO2004US16041 |
申请日期 |
2004.05.13 |
| 申请人 |
LATTICE SEMICONDUCTOR CORPORATION |
发明人 |
ZHANG, FULONG;ANDREWS, WILLIAM;JOHNSON, PHILLIP;SCHOLZ, HAL;CHEN, ZHENG;SCHADT, JOHN |
| 分类号 |
G06F7/38;H01L;H03K5/00;H03K5/13;H03L7/081 |
主分类号 |
G06F7/38 |
| 代理机构 |
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