发明名称 Single-Pass Methods for Generating Test Patterns for Sequential Circuits
摘要 A single-pass method for generating test patterns for sequential circuits operates upon an iterative array of time-frames representing the circuit. A mapping function is inserted at the end of each time-frame. Fault objects arriving at circuit next-state lines are mapped into good next-state fault objects and are placed onto corresponding present-state lines for a next time-frame. The good next-state mapping permits fault-propagation and path-enabling function size to be bounded by a size established during an initial time-frame. Path-enabling functions created during the initial time-frame are saved and are reused during subsequent time-frames. A search for test patterns continues from one time-frame to a next until a valid test pattern is found for each detectable fault.
申请公布号 US2005166114(A1) 申请公布日期 2005.07.28
申请号 US20050908146 申请日期 2005.04.28
申请人 YARDSTICK RESEARCH, LLC 发明人 BUCKLEY DELMAS R.JR.
分类号 G01R31/28;G01R31/3183;G06F11/00;(IPC1-7):G06F11/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址