发明名称 Configurable width buffered module having switch elements
摘要 A memory system architecture/interconnect topology includes a configurable width buffered memory module having a configurable width buffer device with at least one switch element. A buffer device, such as a configurable width buffer device, is positioned between or with at least one integrated circuit memory device positioned on a substrate surface of a memory module, such as a DIMM. A switch element is positioned on or off a memory module and includes two transistors in embodiments of the invention. One or more switch elements are coupled to one or more channels to allow for upgrades of memory modules in a memory system. An asymmetrical switch topology allows for increasing the number of memory modules to more than two memory modules without adding switch elements serially on each channel. Switch elements allow for increasing the number of ranks of memory modules in a system, while also achieving many of the benefits associated with point-to-point topology.
申请公布号 US2005166026(A1) 申请公布日期 2005.07.28
申请号 US20040889852 申请日期 2004.07.13
申请人 WARE FRED;PEREGO RICHARD;TSERN ELY 发明人 WARE FRED;PEREGO RICHARD;TSERN ELY
分类号 G06F13/16;G11C29/02;(IPC1-7):G06F12/00 主分类号 G06F13/16
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