| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory interface system allowing high-speed data transfer between a memory and a memory controller, in a memory system. SOLUTION: A command signal, an address signal or a data signal outputted from the memory controller are sequentially transferred to a memory in a final stage from a memory in an initial stage, and the data signal outputted from the memory in the final stage is inputted to the memory controller. When writing data, the data signal is written into a memory address of a memory having an identification number according with an identification number designated by the address signal. When reading the data, the data are read from the memory address of the memory having the identification number according with the identification number designated by the address signal, and the read data are transferred to the memory in the final stage as the data signal, and are supplied to the memory controller from the memory in the final stage. COPYRIGHT: (C)2005,JPO&NCIPI
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