| 发明名称 |
Method and apparatus for inverse Fourier transform in pipelined architecture |
| 摘要 |
<p>The inverse Fourier transform parallel pipeline processing technique inputs initial samples (Ck) of a digital stream to an interlaced processing unit. An auxiliary complex sample (Ak) is formed from initial input. Different stages of inverse transformation are carried out using pipeline architecture processing (DF), using two different memories (MMA,MMB), the elementary processing being separated into two parts.</p> |
| 申请公布号 |
EP1058435(B1) |
申请公布日期 |
2005.07.27 |
| 申请号 |
EP20000401470 |
申请日期 |
2000.05.25 |
| 申请人 |
STMICROELECTRONICS S.A.;FRANCE TELECOM |
发明人 |
CAMBONIE, JOEL;MEJEAN, PHILIPPE;BARTHEL, DOMINIQUE;LIENARD, JOEL;MAZZONI, SIMONE |
| 分类号 |
G06F17/14;G06T1/60;H04J11/00;H04L27/26;(IPC1-7):H04L27/26 |
主分类号 |
G06F17/14 |
| 代理机构 |
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