Test mode activation by phase comparison

摘要

A semiconductor integrated circuit device (10) has a pair of oscillator terminals (X0, X1) that is respectively provided with two oscillation signals having phases opposite to each other. An oscillator circuit (11) provides an internal circuit with a system clock signal based on the oscillation signals. A mode detection circuit (12) detects that the pair of oscillator terminals is respectively provided with two input signals having the same phase, and provides a test circuit (13) with a detection signal. The test circuit sets a test mode according to the detection signal, and provides the internal circuit with a predetermined test signal. By setting the test mode using a pair of external terminals, an increase in the number of external terminals of the semiconductor integrated circuit device can be prevented. <IMAGE>