发明名称 |
Hybrid compensated buffer design |
摘要 |
According to one embodiment of the present invention, a circuit is disclosed. The circuit includes a plurality of driver slices, a portion of the plurality of the devices being used to provide a target impedance; a digital matching logic to select the portion of the plurality of the driver slices; and an analog matching circuit to produce a bias voltage to match pull-up and pull-down.
|
申请公布号 |
US6922077(B2) |
申请公布日期 |
2005.07.26 |
申请号 |
US20030608633 |
申请日期 |
2003.06.27 |
申请人 |
INTEL CORPORATION |
发明人 |
CHANDLER JAMES E.;ZUMKEHR JOHN F.;FORESTIER ARNAUD |
分类号 |
H03K19/00;(IPC1-7):H03K19/003 |
主分类号 |
H03K19/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|