| 摘要 |
<p>A strain Si layer (2) is epitaxially grown on an underlying SiGe layer (1), and a gate insulating film (3a) and a gate electrode (4a) are formed. Then, using the gate electrode (4a) as a mask, impurity ions are implanted into the underlying SiGe layer (1) and the strain Si layer (2) (Fig. 2(a)). A heat treatment for activation is carried out to form source/drain regions (6) (Figs. 2(b), 2(c)). The thickness of the strain Si layer (2) is limited to 2Tp or less where Tp(=Rp) is the depth at which the eventual impurity concentration of the source/drain regions (6) of the MISFET is maximum.</p> |
