发明名称 |
Circuits and methods for high-capacity asynchronous pipeline processing |
摘要 |
A latchless dynamic asynchronous digital pipeline circuit provides decoupled control of pull-up and pull-down. Using two decoupled input, a stage is driven through three distinct phases in sequence: evaluate, isolate and precharge. In the isolate phase, a stage holds its outputs stable irrespective of any changes at its inputs. Adjacent pipeline stages are capable of storing distinct data items without spacers.
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申请公布号 |
US2005156633(A1) |
申请公布日期 |
2005.07.21 |
申请号 |
US20050080333 |
申请日期 |
2005.03.15 |
申请人 |
SINGH MONTEK;NOWICK STEVEN M. |
发明人 |
SINGH MONTEK;NOWICK STEVEN M. |
分类号 |
G06F7/00;G06F1/12;G06F9/38;H03K19/00;(IPC1-7):H03K19/00 |
主分类号 |
G06F7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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