发明名称 Semiconductor device and an image processor
摘要 An apparatus for encoding a plurality of image data series and decoding a plurality of encoded image data series includes an interface control circuit for executing data read/write operation from and to a memory area, an encoding/decoding circuit for selectively executing encoding of image data of one series written into the memory area or decoding of encoded image data of one series, and a plurality of registers for giving an instruction of processing to the encoding/decoding circuit wherein the encoding/decoding circuit executes encoding and decoding on a time division basis and in a series unit for image data of a plurality of series in accordance with the instruction from the plurality of registers. The apparatus for executing encoding and decoding of multi-stream image data can be rendered compact in size.
申请公布号 US2005157935(A1) 申请公布日期 2005.07.21
申请号 US20040008178 申请日期 2004.12.10
申请人 WATANABE HIROMI 发明人 WATANABE HIROMI
分类号 H04N7/32;G06K9/36;H04N7/26;H04N7/50;(IPC1-7):G06K9/36 主分类号 H04N7/32
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