发明名称 FRAME SYNCHRONIZATION CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a frame synchronization circuit which carries out processing effectively for detecting a maximum value by making a correlation in the range of one-frame detection. <P>SOLUTION: The circuit includes a signal accumulation memory 105 for accumulating a received frame signal intermittently, a correlator 106 for making a correlation between a synchronous word and the frame signal accumulated in the signal accumulation memory, a maximum value detector 107 for detecting a maximum value of the correlation output of the correlator, a comparator 109 for comparing a previously set threshold with the maximum value obtained by the maximum value detector and detecting the maximum value larger than the threshold, a preset signal generator 110 for generating a preset signal based on the large maximum value detected by the comparator, a sample counter 112 preset by the preset signal from the preset signal generator, and an accumulation starting signal generator 111 for generating an accumulation starting signal through a clock from the sample counter and carrying out frame synchronization with the frame signal received by the accumulation starting signal. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005198136(A) 申请公布日期 2005.07.21
申请号 JP20040003750 申请日期 2004.01.09
申请人 HITACHI KOKUSAI ELECTRIC INC 发明人 EJIMA AKIRA;KOBAYASHI TAKEHIKO
分类号 H04L7/08 主分类号 H04L7/08
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