发明名称 Computer architecture and system for efficient management of bi-directional bus
摘要 An efficient system and method for managing reads and writes on a bi-directional bus to optimize bus performance while avoiding bus contention and avoiding read/write starvation. In particular, by intelligently managing reads and writes on a bi-directional bus, bus latency can be reduced while still ensuring no bus contention or read/write starvation. This is accomplished by utilizing bus streaming control logic, separate queues for reads and writes, and a simple 2 to 1 mux.
申请公布号 US6920512(B2) 申请公布日期 2005.07.19
申请号 US20040780395 申请日期 2004.02.17
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 STEINMAN MAURICE B.;KESSLER RICHARD E.;BOUCHARD GREGG A.
分类号 G06F13/40;(IPC1-7):G06F13/00 主分类号 G06F13/40
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