发明名称 |
Feedforward limited switch dynamic logic circuit |
摘要 |
The N channel field effect transistor (NFET) of the inverting output stage of a LSDL gate is split into a large NFET and a small NFET. The large NFET is coupled to a feedforward pulse so that it is turned ON only when the inverting output is a logic one. When the inverting output is a logic one, another inverting stage turns ON if the dynamic node evaluates to a logic zero. The dynamic node is inverted and coupled to the large NFET on the inverting output stage thus quickly pulling the inverting output to a logic zero. The small NFET is turned ON as a keeper device through the normal logic path. If the inverting data output is a logic zero the feedforward pulse is not generated. By making the largest NFET a pulsed device the other FETs are reduced in size resulting in leakage and switching power savings.
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申请公布号 |
US6919739(B2) |
申请公布日期 |
2005.07.19 |
申请号 |
US20030733950 |
申请日期 |
2003.12.11 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
NGO HUNG C. |
分类号 |
H03K3/012;H03K3/356;H03K19/096;(IPC1-7):H03K19/00 |
主分类号 |
H03K3/012 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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