发明名称 Apparatus and method for testing redundant memory elements
摘要 A semiconductor device includes a primary memory array, primary addressing circuitry, a redundant memory array, redundant addressing circuitry, and a first signal pad. The primary memory array includes primary memory elements operable to store data, and the primary addressing circuit is operable to select the primary memory elements. The redundant memory array includes redundant memory elements operable to store data and is also operable to be programmed from a programmable state to provide redundant memory elements for defective primary memory elements. The first signal pad is operable to receive serial selection data, and the redundant addressing circuit is connected to the first signal pad and is operable to receive the serial selection data from the first signal pad and select the redundant memory elements in response.
申请公布号 US6920072(B2) 申请公布日期 2005.07.19
申请号 US20030377449 申请日期 2003.02.28
申请人 UNION SEMICONDUCTOR TECHNOLOGY CORPORATION 发明人 THEEL WAYNE ARTHUR
分类号 G11C29/00;G11C29/24;(IPC1-7):G11C29/00 主分类号 G11C29/00
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