发明名称 |
Semiconductor device and semiconductor memory device |
摘要 |
A semiconductor memory device according to the present invention includes: a plurality of N-ch MOS transistors arranged in an area surrounding a plurality of memory cells arranged in an array, at a spacing depending on a spacing of the plurality of memory cells, for driving the plurality of memory cells; and a plurality of dummy transistors 32 -j each of which is formed between two adjacent ones of the plurality of N-ch MOS transistors 30 -k so as to share diffusion layers with adjacent N-ch MOS transistors 30 and each of which has a gate electrode supplied with a voltage for electrically insulating these adjacent transistors 30 -k.
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申请公布号 |
US6920079(B2) |
申请公布日期 |
2005.07.19 |
申请号 |
US20040902133 |
申请日期 |
2004.07.30 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
SHIBAYAMA AKINORI |
分类号 |
G11C11/41;G11C11/412;H01L21/8244;H01L27/11;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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