发明名称 METHOD AND STRUCTURE FOR TESTING EMBEDDED CORES BASED SYSTEM-ON-A-CHIP
摘要 A method of testing embedded cores in an integrated circuit chip having a microprocessor core, a memory core and other functional cores therein. The method includes the steps of; forming a plurality of registers in the integrated circuit chip, testing the microprocessor core by executing its instructions multiple times with pseudo random data and evaluating the results by comparing simulation results, applying a test program to the microprocessor core to generate a memory test pattern by the microprocessor core, applying the memory test pattern to the memory core by the microprocessor core and evaluating the response of the memory core by the microprocessor core, and testing the other functional cores by applying a function specific test pattern thereto by the microprocessor core and evaluating the resultant output signals of the functional cores.
申请公布号 KR100502128(B1) 申请公布日期 2005.07.19
申请号 KR19990047027 申请日期 1999.10.28
申请人 发明人
分类号 G01R31/28;G06F11/22;G01R31/3183;G01R31/3185;G06F11/267;G11C29/20;(IPC1-7):G01R31/28 主分类号 G01R31/28
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