| 发明名称 |
Shallow trench isolation process and structure with minimized strained silicon consumption |
| 摘要 |
A method of manufacturing an integrated circuit (IC) utilizes a shallow trench isolation (STI) technique. The shallow trench isolation technique is used in strained silicon (SMOS) process. The strained material is formed after the trench is formed. The process can be utilized on a compound semiconductor layer above a box layer.
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| 申请公布号 |
US2005151222(A1) |
申请公布日期 |
2005.07.14 |
| 申请号 |
US20040755602 |
申请日期 |
2004.01.12 |
| 申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
XIANG QI;PAN JAMES N.;GOO JUNG-SUK |
| 分类号 |
H01L21/336;H01L21/762;H01L29/10;H01L29/45;H01L29/786;(IPC1-7):H01L21/76;H01L29/00 |
主分类号 |
H01L21/336 |
| 代理机构 |
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