发明名称 |
Mikroprozessor mit hardwaregesteuerter Leistungsverwaltung und auswählbaren Eingangs-/Ausgangssteuerungssteckerstiften und Verfahren hierfür |
摘要 |
A data processing device includes a plurality of subcircuits and circuitry for generating clock signals thereto. Detection circuitry detects the assertion of a control signal and disabling circuitry is operable to disable the clock signals to one or more of the subcircuits responsive to the control signal. In addition, circuitry is provided for selectively decoupling one or more subcircuits with associated input/output pins such that pins associated with enhanced features may be decoupled to provide compatibility with a desired microprocessor architecture. <IMAGE> |
申请公布号 |
DE69333445(T2) |
申请公布日期 |
2005.07.14 |
申请号 |
DE1993633445T |
申请日期 |
1993.03.26 |
申请人 |
NATIONAL SEMICONDUCTOR CORP., SANTA CLARA |
发明人 |
MAHER, ROBERT D;GARIBAY, RAUL A;HERUBIN, MARGARET R;BLUHM, MARK |
分类号 |
G06F15/78;G06F1/04;G06F1/32;G06F9/30;G06F9/38;G06F13/40;(IPC1-7):G06F1/32 |
主分类号 |
G06F15/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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