| 摘要 |
PROBLEM TO BE SOLVED: To provide a matrix converter capable of reducing the number of on/off timing signals, outputted from a microcomputer or an on/off timing computing unit of a DSP and the like so as to be fewer than eighteen as the number of switching elements, in a three-phase output matrix converter, and provide a controller, capable of distributing load on elements in a main circuit of the matrix converter. SOLUTION: The control circuit comprises the microcomputer or the on/off timing computing unit of the DSP and the like, and a logic circuit or an integrated circuit assembled by the logic circuit, such as FPGA. The computing unit performs computation of an output voltage command value and outputs the on/off timing signals which has the number of systems fewer than the number of the switching elements. The logic circuit or the integrated circuit, assembled by the logic circuit, comprises a circuit for computing switching command, hereinafter, to be referred to as a "command generating section", based on the information on an output current or on input voltage. COPYRIGHT: (C)2005,JPO&NCIPI
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