发明名称 Method of manufacturing p-channel MOS transistor and CMOS transistor
摘要 A method of manufacturing a p-channel MOS transistor including forming a structure by subsequently stacking gate insulating layer pattern and a gate conductive layer pattern on a semiconductor substrate. The method also includes forming first offset spacer layers on sides of the gate conductive layer pattern, forming a second-offset-spacer-layer insulating layer to cover the semiconductor substrate, the first offset spacer layer, and the gate conductive layer pattern, implanting p-type impurity ions in the second-offset-spacer-layer insulating layer by performing a first ion implanting process, and forming a second offset spacer layer and a gate spacer layer on the first offset spacer layer by performing a spacer layer forming process. The method further includes forming source/drain extension regions by diffusing the implanted p-type impurity ions by performing a thermal treatment process, and forming source/drain regions passing through the respective source/drain extension regions by performing a second ion implanting process by using the gate spacer layer as an ion implanting barrier.
申请公布号 US2005153498(A1) 申请公布日期 2005.07.14
申请号 US20040020096 申请日期 2004.12.27
申请人 DONGBUANAM SEMICONDUCTOR INC. 发明人 KIM HAK-DONG
分类号 H01L21/225;H01L21/265;H01L21/3115;H01L21/336;H01L21/8238;H01L29/10;(IPC1-7):H01L21/336;H01L21/823 主分类号 H01L21/225
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