发明名称 RATE VERIFICATION OF AN INCOMING SERIAL ALIGNMENT SEQUENCE
摘要 A technique for rate verification of an incoming serial alignment sequence includes receiving an incoming serial stream. A determination is then made as to whether an align sequence is recognized in the incoming serial stream. When an align sequence is recognized, a check is made to determine if an appropriate number of align primitives are received during a predetermined number of clock periods. If the number of received align primitives matches the predetermined number, then a rate-verified align detect signal is asserted.
申请公布号 WO2005064483(A1) 申请公布日期 2005.07.14
申请号 WO2004US43337 申请日期 2004.12.23
申请人 INTEL CORPORATION;VON BOKERN, VINCENT, E.;BEDWANI, SERGE 发明人 VON BOKERN, VINCENT, E.;BEDWANI, SERGE
分类号 G06F13/42;H04L25/02;(IPC1-7):G06F13/42 主分类号 G06F13/42
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