| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To perform image processing efficiently by using a plurality of processors. <P>SOLUTION: A processor element 101 is provided with a plurality of attached processing units (APU) 106, 107, etc., and each APU can access a DRAM 102 via a DMAC 103. The APU reads a program for coding processing and motion detection processing stored in the DRAM 102, and image processing is carried out by a segment (for example, a slice) unit defined by dividing one screen of an animation image into a plurality of segments. The APU accesses a shared memory 108 of the DRAM 102 to refer to a process queue 113 and a read pointer 115. In the process queue 113 and the read pointer 115, a progress status of image processing for each segment formed by dividing the screen is stored. The APU accessing the shared memory 108 selects a segment of the latest progress status and performs image processing on the selected segment. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
