ADAPTIVE LAYOUT CACHE ORGANIZATION TO ENABLE OPTIMAL CACHE HARDWARE PERFORMANCE

摘要

A cache memory mapping algorithm and associated hardware maps cache lines in a manner such that each set contains cache lines from only one cache memory chip. Sequential disk accesses are mapped to sequential sets to allow stored data to be retrieved simultaneously from to different cache storage chips. The cache line allocation policy ensures that new cache lines are dynamically inserted into the proper sets and correspond to the correct cache memory chip.