Multithread processor architecture for triggered thread switching without any cycle time loss, and without any switching program command

摘要

A multithread processor according to the inventive architecture is a clocked multithread processor for data processing of threads having a standard processor root unit ( 1 ) in which threads can be switched to a different thread T₁ by means a thread switching trigger data field ( 11 ), triggered by the thread T_j which is currently to be processed by the standard processor root unit ( 1 ), without any clock cycle loss, with each program instruction I_jk for a thread T_j having a thread switching trigger data field ( 11 ) such as this.