发明名称 Programmable phase interpolator adjustment for ideal data eye sampling
摘要 A clock recovery circuit includes a demodulator which generates in-phase and quadrature signals from a data signal and a phase adjuster which adjusts a phase of the quadrature signal independently from a phase of the in-phase clock signal. The phase adjustment causes a non-orthogonal relationship to exist between the phases of the quadrature and in-phase signals. The independent phase adjustment may be dynamically performed or may be performed in fixed increments to achieve a predetermined level of performance. In one application, the adjusted quadrature phase signal serves as a clock signal for controlling sampling of the data signal.
申请公布号 US2005147194(A1) 申请公布日期 2005.07.07
申请号 US20030748236 申请日期 2003.12.31
申请人 INTEL CORPORATION 发明人 KOENENKAMP INGO
分类号 H03L7/081;H03L7/091;H03L7/099;H04L1/00;H04L7/033;(IPC1-7):H04L1/00 主分类号 H03L7/081
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