发明名称 |
Nonvolatile semiconductor memory device with scalable two transistor memory cells |
摘要 |
A nonvolatile memory device includes a bit line, a pair of data lines and a plurality of scalable two transistor memory (STTM) cells. The memory cells are arranged between a pair of datalines so as to share the bit line. The memory device further includes a data line selection circuit and a sense amplification circuit. The data line selection circuit selects one of a pair of data lines, and the sense amplification circuit senses and amplifies a voltage difference between the bit line and the selected data line. Operation speed is increased, while improving device cell array structure.
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申请公布号 |
US2005146929(A1) |
申请公布日期 |
2005.07.07 |
申请号 |
US20040976626 |
申请日期 |
2004.10.29 |
申请人 |
CHO WOO-YEONG;CHOI BYUNG-GIL |
发明人 |
CHO WOO-YEONG;CHOI BYUNG-GIL |
分类号 |
G11C16/04;G11C11/34;G11C16/02;H01L27/115;(IPC1-7):G11C11/34 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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