发明名称 Mixed LVR and HVR reticle set design for the processing of gate arrays, embedded arrays and rapid chip products
摘要 An embodiment of the present invention provides a novel method which makes LVR to HVR registration possible by wrapping the X and Y scribes around each instance of each layer on both the LVR and HVR reticles; standard HVR reticles and LVR reticles will not align to one another due to registration and electrical test structures in the scribe being in different locations. Another embodiment of the present invention addresses the loss of die per wafer due to increased scribe area when using LVR and HVR reticles in the same set.
申请公布号 US2005147913(A1) 申请公布日期 2005.07.07
申请号 US20050053505 申请日期 2005.02.08
申请人 LSI LOGIC CORPORATION 发明人 JENSEN JOHN;MULLER ROBERT;SIMMONS MARK
分类号 G03C8/00;G03F7/20;G03F9/00;H01L21/337;H01L21/44;H01L21/4763;H01L21/48;H01L21/50;H01L23/544;(IPC1-7):G03F9/00 主分类号 G03C8/00
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